Application of the residue number system to reduce hardware costs of the convolutional neural network implementation

Convolutional neural networks are a promising tool for solving the problem of pattern recognition. Most well-known convolutional neural networks implementations require a significant amount of memory to store weights in the process of learning and working. We propose a convolutional neural network a...

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Główni autorzy:	Valueva, M. V., Валуева, М. В., Nagornov, N. N., Нагорнов, Н. Н., Lyakhov, P. A., Ляхов, П. А., Valuev, G. V., Валуев, Г. В., Chervyakov, N. I., Червяков, Н. И.
Format:	Статья
Język:	English
Wydane:	Elsevier B.V. 2020
Hasła przedmiotowe:	Convolutional neural networks Field-programmable gate array (FPGA) Image processing Quantization noise Residue number system (RNS)
Dostęp online:	https://dspace.ncfu.ru/handle/20.500.12258/12120
Etykiety:	Dodaj etykietę Nie ma etykietki, Dołącz pierwszą etykiete!

id	ir-20.500.12258-12120
record_format	dspace
spelling	ir-20.500.12258-121202020-07-03T09:48:59Z Application of the residue number system to reduce hardware costs of the convolutional neural network implementation Valueva, M. V. Валуева, М. В. Nagornov, N. N. Нагорнов, Н. Н. Lyakhov, P. A. Ляхов, П. А. Valuev, G. V. Валуев, Г. В. Chervyakov, N. I. Червяков, Н. И. Convolutional neural networks Field-programmable gate array (FPGA) Image processing Quantization noise Residue number system (RNS) Convolutional neural networks Convolutional neural networks are a promising tool for solving the problem of pattern recognition. Most well-known convolutional neural networks implementations require a significant amount of memory to store weights in the process of learning and working. We propose a convolutional neural network architecture in which the neural network is divided into hardware and software parts to increase performance and reduce the cost of implementation resources. We also propose to use the residue number system (RNS) in the hardware part to implement the convolutional layer of the neural network. Software simulations using Matlab 2018b showed that convolutional neural network with a minimum number of layers can be quickly and successfully trained. The hardware implementation of the convolution layer shows that the use of RNS allows to reduce the hardware costs on 7.86%–37.78% compared to the two's complement implementation. The use of the proposed heterogeneous implementation reduces the average time of image recognition by 41.17% 2020-06-25T14:20:38Z 2020-06-25T14:20:38Z 2020 Статья Valueva, M.V., Nagornov, N.N., Lyakhov, P.A., Valuev, G.V., Chervyakov, N.I. Application of the residue number system to reduce hardware costs of the convolutional neural network implementation // Mathematics and Computers in Simulation. - 2020. - Volume 177. - Pages 232-243 http://hdl.handle.net/20.500.12258/12120 en Mathematics and Computers in Simulation application/pdf application/pdf Elsevier B.V.
institution	СКФУ
collection	Репозиторий
language	English
topic	Convolutional neural networks Field-programmable gate array (FPGA) Image processing Quantization noise Residue number system (RNS) Convolutional neural networks
spellingShingle	Convolutional neural networks Field-programmable gate array (FPGA) Image processing Quantization noise Residue number system (RNS) Convolutional neural networks Valueva, M. V. Валуева, М. В. Nagornov, N. N. Нагорнов, Н. Н. Lyakhov, P. A. Ляхов, П. А. Valuev, G. V. Валуев, Г. В. Chervyakov, N. I. Червяков, Н. И. Application of the residue number system to reduce hardware costs of the convolutional neural network implementation
description	Convolutional neural networks are a promising tool for solving the problem of pattern recognition. Most well-known convolutional neural networks implementations require a significant amount of memory to store weights in the process of learning and working. We propose a convolutional neural network architecture in which the neural network is divided into hardware and software parts to increase performance and reduce the cost of implementation resources. We also propose to use the residue number system (RNS) in the hardware part to implement the convolutional layer of the neural network. Software simulations using Matlab 2018b showed that convolutional neural network with a minimum number of layers can be quickly and successfully trained. The hardware implementation of the convolution layer shows that the use of RNS allows to reduce the hardware costs on 7.86%–37.78% compared to the two's complement implementation. The use of the proposed heterogeneous implementation reduces the average time of image recognition by 41.17%
format	Статья
author	Valueva, M. V. Валуева, М. В. Nagornov, N. N. Нагорнов, Н. Н. Lyakhov, P. A. Ляхов, П. А. Valuev, G. V. Валуев, Г. В. Chervyakov, N. I. Червяков, Н. И.
author_facet	Valueva, M. V. Валуева, М. В. Nagornov, N. N. Нагорнов, Н. Н. Lyakhov, P. A. Ляхов, П. А. Valuev, G. V. Валуев, Г. В. Chervyakov, N. I. Червяков, Н. И.
author_sort	Valueva, M. V.
title	Application of the residue number system to reduce hardware costs of the convolutional neural network implementation
title_short	Application of the residue number system to reduce hardware costs of the convolutional neural network implementation
title_full	Application of the residue number system to reduce hardware costs of the convolutional neural network implementation
title_fullStr	Application of the residue number system to reduce hardware costs of the convolutional neural network implementation
title_full_unstemmed	Application of the residue number system to reduce hardware costs of the convolutional neural network implementation
title_sort	application of the residue number system to reduce hardware costs of the convolutional neural network implementation
publisher	Elsevier B.V.
publishDate	2020
url	https://dspace.ncfu.ru/handle/20.500.12258/12120
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Application of the residue number system to reduce hardware costs of the convolutional neural network implementation

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