A new model to optimize the architecture of a fault-tolerant modular neurocomputer

In this paper, we present some results on error detection and correction in a modular neurocomputer that are based on redundant residue number systems. The error correction method developed below involves the modified Chinese Remainder Theorem with fractions and uses a Hopfield neural network to cor...

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Huvudupphovsmän:	Chervyakov, N. I., Червяков, Н. И., Lyakhov, P. A., Ляхов, П. А., Babenko, M. G., Бабенко, М. Г., Lavrinenko, I. N., Лавриненко, И. Н., Lavrinenko, A. V., Лавриненко, А. В., Deryabin, M. A., Дерябин, М. А., Nazarov, A. S., Назаров, А. С.
Materialtyp:	Статья
Språk:	English
Publicerad:	Elsevier B.V. 2018
Ämnen:	Digital neuron Hopfield neural network Modular neurocomputer Residue number system (RNS) Very large scale integrated (VLSI) circuit
Länkar:	https://www.scopus.com/record/display.uri?eid=2-s2.0-85046691005&origin=resultslist&sort=plf-f&src=s&nlo=1&nlr=20&nls=afprfnm-t&affilName=nort+caucas+fed+univ&sid=66c0b1a32aef918b6dc8f22f4ab4e9b7&sot=afnl&sdt=afsp&sl=53&s=%28AF-ID%28%22North+Caucasus+Federal+University%22+60070541%29%29&relpos=0&citeCnt=0&searchTerm= https://dspace.ncfu.ru:443/handle/20.500.12258/220
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spelling	ir-20.500.12258-2202020-07-10T08:48:39Z A new model to optimize the architecture of a fault-tolerant modular neurocomputer Chervyakov, N. I. Червяков, Н. И. Lyakhov, P. A. Ляхов, П. А. Babenko, M. G. Бабенко, М. Г. Lavrinenko, I. N. Лавриненко, И. Н. Lavrinenko, A. V. Лавриненко, А. В. Deryabin, M. A. Дерябин, М. А. Nazarov, A. S. Назаров, А. С. Digital neuron Hopfield neural network Modular neurocomputer Residue number system (RNS) Very large scale integrated (VLSI) circuit In this paper, we present some results on error detection and correction in a modular neurocomputer that are based on redundant residue number systems. The error correction method developed below involves the modified Chinese Remainder Theorem with fractions and uses a Hopfield neural network to correct the errors. The suggested approach eliminates the need for extending the bases of a residue number system, a costly operation required in case of syndrome decoding with error syndromes calculation on the control bases of the system. Also the approach does not utilize the projection method, another costly operation intended to localize errors (i.e., to detect the moduli associated with faulty digits). The well-known procedures mentioned above seem inefficient in terms of practical implementation, as they employ a mixed radix number system: transition to such a system is iterative and may affect the performance of a whole neurocomputer. Owing to the exclusion of these costly operations, the suggested approach significantly simplifies error correction procedures for integer numbers 2018-05-21T14:24:32Z 2018-05-21T14:24:32Z 2018 Статья Chervyakov, N.I., Lyakhov, P.A., Babenko, M.G., Lavrinenko, I.N., Lavrinenko, A.V., Deryabin, M.A., Nazarov, A.S. A new model to optimize the architecture of a fault-tolerant modular neurocomputer // Neurocomputing. - 2018. - Volume 303. - pp. 37-46. https://www.scopus.com/record/display.uri?eid=2-s2.0-85046691005&origin=resultslist&sort=plf-f&src=s&nlo=1&nlr=20&nls=afprfnm-t&affilName=nort+caucas+fed+univ&sid=66c0b1a32aef918b6dc8f22f4ab4e9b7&sot=afnl&sdt=afsp&sl=53&s=%28AF-ID%28%22North+Caucasus+Federal+University%22+60070541%29%29&relpos=0&citeCnt=0&searchTerm= https://dspace.ncfu.ru:443/handle/20.500.12258/220 en Neurocomputing application/pdf application/pdf Elsevier B.V.
institution	СКФУ
collection	Репозиторий
language	English
topic	Digital neuron Hopfield neural network Modular neurocomputer Residue number system (RNS) Very large scale integrated (VLSI) circuit
spellingShingle	Digital neuron Hopfield neural network Modular neurocomputer Residue number system (RNS) Very large scale integrated (VLSI) circuit Chervyakov, N. I. Червяков, Н. И. Lyakhov, P. A. Ляхов, П. А. Babenko, M. G. Бабенко, М. Г. Lavrinenko, I. N. Лавриненко, И. Н. Lavrinenko, A. V. Лавриненко, А. В. Deryabin, M. A. Дерябин, М. А. Nazarov, A. S. Назаров, А. С. A new model to optimize the architecture of a fault-tolerant modular neurocomputer
description	In this paper, we present some results on error detection and correction in a modular neurocomputer that are based on redundant residue number systems. The error correction method developed below involves the modified Chinese Remainder Theorem with fractions and uses a Hopfield neural network to correct the errors. The suggested approach eliminates the need for extending the bases of a residue number system, a costly operation required in case of syndrome decoding with error syndromes calculation on the control bases of the system. Also the approach does not utilize the projection method, another costly operation intended to localize errors (i.e., to detect the moduli associated with faulty digits). The well-known procedures mentioned above seem inefficient in terms of practical implementation, as they employ a mixed radix number system: transition to such a system is iterative and may affect the performance of a whole neurocomputer. Owing to the exclusion of these costly operations, the suggested approach significantly simplifies error correction procedures for integer numbers
format	Статья
author	Chervyakov, N. I. Червяков, Н. И. Lyakhov, P. A. Ляхов, П. А. Babenko, M. G. Бабенко, М. Г. Lavrinenko, I. N. Лавриненко, И. Н. Lavrinenko, A. V. Лавриненко, А. В. Deryabin, M. A. Дерябин, М. А. Nazarov, A. S. Назаров, А. С.
author_facet	Chervyakov, N. I. Червяков, Н. И. Lyakhov, P. A. Ляхов, П. А. Babenko, M. G. Бабенко, М. Г. Lavrinenko, I. N. Лавриненко, И. Н. Lavrinenko, A. V. Лавриненко, А. В. Deryabin, M. A. Дерябин, М. А. Nazarov, A. S. Назаров, А. С.
author_sort	Chervyakov, N. I.
title	A new model to optimize the architecture of a fault-tolerant modular neurocomputer
title_short	A new model to optimize the architecture of a fault-tolerant modular neurocomputer
title_full	A new model to optimize the architecture of a fault-tolerant modular neurocomputer
title_fullStr	A new model to optimize the architecture of a fault-tolerant modular neurocomputer
title_full_unstemmed	A new model to optimize the architecture of a fault-tolerant modular neurocomputer
title_sort	new model to optimize the architecture of a fault-tolerant modular neurocomputer
publisher	Elsevier B.V.
publishDate	2018
url	https://www.scopus.com/record/display.uri?eid=2-s2.0-85046691005&origin=resultslist&sort=plf-f&src=s&nlo=1&nlr=20&nls=afprfnm-t&affilName=nort+caucas+fed+univ&sid=66c0b1a32aef918b6dc8f22f4ab4e9b7&sot=afnl&sdt=afsp&sl=53&s=%28AF-ID%28%22North+Caucasus+Federal+University%22+60070541%29%29&relpos=0&citeCnt=0&searchTerm= https://dspace.ncfu.ru:443/handle/20.500.12258/220
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A new model to optimize the architecture of a fault-tolerant modular neurocomputer

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