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Reducing the Computational Complexity of Image Processing Using Wavelet Transform Based on the Winograd Method

Modern computer technology devices do not keep pace with the high growth rate of quantitative and qualitative characteristics of digital images. The computational complexity of the wavelet transform must be reduced for the hardware-friendly implementation of wavelet image processing methods on micro...

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Bibliografische gegevens
Hoofdauteurs: Lyakhov, P. A., Ляхов, П. А., Nagornov, N. N., Нагорнов, Н. Н., Semyonova, N. F., Семенова, Н. Ф., Abdulsalyamova, A. S., Абдулсалямова, А. Ш.
Formaat: Статья
Taal:Russian
Gepubliceerd in: 2023
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Online toegang:https://dspace.ncfu.ru/handle/20.500.12258/24284
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Samenvatting:Modern computer technology devices do not keep pace with the high growth rate of quantitative and qualitative characteristics of digital images. The computational complexity of the wavelet transform must be reduced for the hardware-friendly implementation of wavelet image processing methods on microelectronic devices. This paper proposes a new approach to reduce the computational complexity of wavelet image processing based on the Winograd method. Group pixel processing using Winograd method reduces the asymptotic computational complexity by up to 72.9% compared to the traditional pixel-by-pixel processing approach, according to the results obtained. A theoretical evaluation of the resource costs of a wavelet image processing device based on the unit-gate model showed that Winograd method reduces device delay to 73.62% and device area to 34.03% compared to the direct implementation. The greatest reduction in resource costs is observed mainly when obtaining fragments of the processed image with 5 pixels. At the same time, the greatest rate of resource reduction is observed when obtaining fragments of the processed image with 3 pixels. Further increase in the fragments size leads to a significantly smaller reduction in resource costs while increasing the complexity of circuits design. Separation of filters into several components is more hardware-friendly when using high-order wavelets. Verification of all obtained results on field-programmable gate arrays and application-specific integrated circuits is a promising direction for further research.