Hardware implementation of video processing device using residue number system
This paper considers the creation of video signal processing device. Important performance criteria of these devices are speed and power consumption. We used an Alinx AX309 board containing FPGA Xilinx Spartan6-xc6s1x9 as a hardware basis for the implementation of the system. OV7670 video camera was...
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Institute of Electrical and Electronics Engineers Inc.
2019
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ir-20.500.12258-70332020-02-14T14:52:34Z Hardware implementation of video processing device using residue number system Chervyakov, N. I. Червяков, Н. И. Lyakhov, P. A. Ляхов, П. А. Ionisyan, A. S. Ионисян, А. С. Valueva, M. V. Валуева, М. В. Digital video processing FPGA Hardware implementation Residue number system (RNS) System-on-chip Video signal processing This paper considers the creation of video signal processing device. Important performance criteria of these devices are speed and power consumption. We used an Alinx AX309 board containing FPGA Xilinx Spartan6-xc6s1x9 as a hardware basis for the implementation of the system. OV7670 video camera was used to obtain a video signal. The output of the processed video was carried out on the Alinx AN430 LCD display and on the standard VGA port. We used the Residue Number System to accelerate calculations. It allowed to improve device speed by 28% compared to using traditional two's complement number system 2019-09-06T09:50:05Z 2019-09-06T09:50:05Z 2019 Статья Kaplun, D.I., Chervyakov, N.I., Lyakhov, P.A., Ionisyan, A.S., Valueva, M.V., Gulvanskiy, V.V., Rangababu, P. Hardware implementation of video processing device using residue number system // 2019 42nd International Conference on Telecommunications and Signal Processing, TSP 2019. - 2019. - Article number 8768827. - Pages 701-704 https://www.scopus.com/record/display.uri?eid=2-s2.0-85071063034&origin=resultslist&sort=plf-f&src=s&st1=Hardware+implementation+of+video+processing+device+using+residue+number+system&st2=&sid=e50a9c724338f914aad21164f394e20c&sot=b&sdt=b&sl=93&s=TITLE-ABS-KEY%28Hardware+implementation+of+video+processing+device+using+residue+number+system%29&relpos=0&citeCnt=0&searchTerm= http://hdl.handle.net/20.500.12258/7033 en 2019 42nd International Conference on Telecommunications and Signal Processing, TSP 2019 application/pdf application/pdf Institute of Electrical and Electronics Engineers Inc. |
institution |
СКФУ |
collection |
Репозиторий |
language |
English |
topic |
Digital video processing FPGA Hardware implementation Residue number system (RNS) System-on-chip Video signal processing |
spellingShingle |
Digital video processing FPGA Hardware implementation Residue number system (RNS) System-on-chip Video signal processing Chervyakov, N. I. Червяков, Н. И. Lyakhov, P. A. Ляхов, П. А. Ionisyan, A. S. Ионисян, А. С. Valueva, M. V. Валуева, М. В. Hardware implementation of video processing device using residue number system |
description |
This paper considers the creation of video signal processing device. Important performance criteria of these devices are speed and power consumption. We used an Alinx AX309 board containing FPGA Xilinx Spartan6-xc6s1x9 as a hardware basis for the implementation of the system. OV7670 video camera was used to obtain a video signal. The output of the processed video was carried out on the Alinx AN430 LCD display and on the standard VGA port. We used the Residue Number System to accelerate calculations. It allowed to improve device speed by 28% compared to using traditional two's complement number system |
format |
Статья |
author |
Chervyakov, N. I. Червяков, Н. И. Lyakhov, P. A. Ляхов, П. А. Ionisyan, A. S. Ионисян, А. С. Valueva, M. V. Валуева, М. В. |
author_facet |
Chervyakov, N. I. Червяков, Н. И. Lyakhov, P. A. Ляхов, П. А. Ionisyan, A. S. Ионисян, А. С. Valueva, M. V. Валуева, М. В. |
author_sort |
Chervyakov, N. I. |
title |
Hardware implementation of video processing device using residue number system |
title_short |
Hardware implementation of video processing device using residue number system |
title_full |
Hardware implementation of video processing device using residue number system |
title_fullStr |
Hardware implementation of video processing device using residue number system |
title_full_unstemmed |
Hardware implementation of video processing device using residue number system |
title_sort |
hardware implementation of video processing device using residue number system |
publisher |
Institute of Electrical and Electronics Engineers Inc. |
publishDate |
2019 |
url |
https://www.scopus.com/record/display.uri?eid=2-s2.0-85071063034&origin=resultslist&sort=plf-f&src=s&st1=Hardware+implementation+of+video+processing+device+using+residue+number+system&st2=&sid=e50a9c724338f914aad21164f394e20c&sot=b&sdt=b&sl=93&s=TITLE-ABS-KEY%28Hardware+implementation+of+video+processing+device+using+residue+number+system%29&relpos=0&citeCnt=0&searchTerm= https://dspace.ncfu.ru/handle/20.500.12258/7033 |
work_keys_str_mv |
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