Scaling algorithm designed to reduce circuit costs for modular digital filters

Scaling algorithm designed to reduce circuit costs for modular digital filters

Currently, there is a tendency to increase the speed and accuracy of data processing in computer networks (CN). It is possible to meet these requirements through the use of new technologies in CN telecommunication devices that rely on residue class codes (RNS). In these codes, input values are prese...

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Главные авторы:	Kalmykov, I. A., Калмыков, И. А., Sidorov, N. S., Сидоров, Н. С.
格式:	Статья
語言:	English
出版:	IOP Publishing Ltd 2020
主題:	Codes (symbols) Timing circuits Digital filters Data handling Cost reduction Digital signal processing
在線閱讀:	https://dspace.ncfu.ru/handle/20.500.12258/14676
標簽:	添加標簽沒有標簽, 成為第一個標記此記錄!

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