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An efficient method of error correction in fault-tolerant modular neurocomputers

An efficient method of error correction in fault-tolerant modular neurocomputers

In this paper, we propose the architecture of a fault-tolerant unit in a modular neurocomputer that is based on decoding with computation of errors syndromes on redundant moduli and implemented using FPGA and a finite ring neural network. The computational complexity of the proposed architecture is...

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Bibliografski detalji
Glavni autori: Chervyakov, N. I., Червяков, Н. И., Lyakhov, P. A., Ляхов, П. А., Babenko, M. G., Бабенко, М. Г., Garyanina, A. I., Гарянина, А. И., Lavrinenko, I. N., Лавриненко, И. Н., Lavrinenko, A. V., Лавриненко, А. В., Deryabin, M. A., Дерябин, М. А.
Format: Статья
Jezik:English
Izdano: Elsevier 2018
Teme:
Artificial neural network
Chinese remainder theorem (CRT)
Fault-tolerance
Mixed radix conversion
Residue number system (RNS)
Network architecture
Online pristup:https://www.scopus.com/record/display.uri?eid=2-s2.0-84969931011&origin=resultslist&sort=plf-f&src=s&nlo=&nlr=&nls=&sid=4571c9c342bce71328dbf4646312b3f0&sot=aff&sdt=cl&cluster=scopubyr%2c%222016%22%2ct&sl=174&s=AF-ID%28%22North+Caucasus+Federal+University%22+60070541%29+OR+AF-ID%28%22Stavropol+State+University%22+60070961%29+OR+AF-ID%28%22stavropolskij+Gosudarstvennyj+Tehniceskij+Universitet%22+60026323%29&relpos=27&citeCnt=9&searchTerm=
https://dspace.ncfu.ru/handle/20.500.12258/3188
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https://www.scopus.com/record/display.uri?eid=2-s2.0-84969931011&origin=resultslist&sort=plf-f&src=s&nlo=&nlr=&nls=&sid=4571c9c342bce71328dbf4646312b3f0&sot=aff&sdt=cl&cluster=scopubyr%2c%222016%22%2ct&sl=174&s=AF-ID%28%22North+Caucasus+Federal+University%22+60070541%29+OR+AF-ID%28%22Stavropol+State+University%22+60070961%29+OR+AF-ID%28%22stavropolskij+Gosudarstvennyj+Tehniceskij+Universitet%22+60026323%29&relpos=27&citeCnt=9&searchTerm=
https://dspace.ncfu.ru/handle/20.500.12258/3188

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